ASIC/SoC Physical Design Engineer II

Arrow Electronics is seeking a Physical Design Engineer II to drive advanced IC implementation for customers in the wholesale technology ecosystem. In this role, you will execute full physical design flows for ASIC/SoC projects, including floorplanning, place-and-route, CTS, STA, and sign-off. You will collaborate with global design, verification, and architecture teams to meet performance, power, and area targets. This position offers exposure to cutting-edge EDA tools, complex designs, continuous learning, and the opportunity to impact next-generation electronic systems worldwide.

Responsibilities

• Execute full physical design flow for ASIC/So
• C projects, including floorplanning, place-and-route, CTS, and optimization.
• Perform static timing analysis and timing closure to meet performance, power, and area targets.
• Run physical verification (DRC/LVS), power, and IR-drop analysis and implement necessary fixes.
• Collaborate with global RTL, verification, and architecture teams to translate specifications into robust physical implementations.
• Develop and maintain automation scripts to improve design flow efficiency and quality.
• Document design methodologies, constraints, and results to support repeatable, scalable processes.

Required Skills

• ASIC/So
• C physical design
• Place and route (P&R)
• Static timing analysis (STA)
• Floorplanning and partitioning
• Clock tree synthesis (CTS)
• Power and IR-drop analysis
• Physical verification (DRC/LVS)
• Scripting (TCL/Perl/Python)
• EDA tools (Cadence/Synopsys/Mentor)
• Low-power design techniques