Digital Signal Processing and FPGA Engineer

Johns Hopkins Applied Physics Laboratory (APL) seeks a Digital Signal Processing and FPGA Engineer to design, implement, and optimize real-time DSP algorithms on FPGA platforms for national security, space, and health applications. You will architect signal-processing pipelines, develop HDL and high-level synthesis code, perform simulations and lab validation, and integrate with embedded systems. Collaborate with multidisciplinary teams, document designs, support experimentation, and contribute to innovative research in radar, communications, and sensing systems.

Responsibilities

• Design and implement real-time digital signal processing algorithms for FPGA-based systems.
• Develop, simulate, and verify HDL (VHDL/Verilog) and high-level synthesis implementations.
• Architect signal-processing pipelines for radar, communications, and sensing applications.
• Integrate FPGA designs with embedded processors, sensors, and system interfaces.
• Perform lab testing, debugging, and performance optimization of FPGA/DSP designs.
• Collaborate with multidisciplinary teams to define requirements and translate concepts into designs.
• Document architectures, interfaces, test procedures, and results for technical reviews.
• Support experiments, field tests, and data analysis to validate system performance.

Required Skills

• Digital signal processing (DSP)
• FPGA design
• VHDL/Verilog
• MATLAB/Simulink
• High-level synthesis (e.g., Vivado HLS, Vitis HLS)
• Embedded systems integration
• Signal simulation and analysis
• Radar and communications signal processing
• Version control (Git)
• Hardware lab test and measurement